United States

We review the drift of MOS devices parameters and the MOS device gate dielectric breakdown in off-state mode. Non-conducting hot carrier may induce significant drift of digital and I.O. devices in overdrive conditions, High voltage asymmetrical devices, power switches as well as RF devices.

Gate dielectric breakdown is critical not only as a parasitic phenomenon occurring while performing accelerated non-conducting HCI stress but also can be a limiting factor for High Voltage asymmetrical MOS devices.

IRPS 2024 Tutorials and YIR

Effect of OFF-State Stress on CMOS Devices

#### Welcome to the 60th IEEE International Reliability Physics Symposium (IRPS)!

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**General Chair Welcome Message**

Welcome to IRPS 2022! When the IRPS Management Committee began making plans for Dallas, we recognized the strong desire by the reliability physics community to return to a face-to-face symposium that we last had in Monterey in 2019. But as time progressed, we recognized that travel restrictions were not being lifted as rapidly as we anticipated. Rather than leave out those of you who could not attend in person, we adopted a hybrid format allowing for both remote attendance and remote presentations. This is a first for IRPS and I am confident it will be a success for all.

With this new hybrid format, the symposium will return to the original five-day format with Tutorials and Year in Review on the first two days. The Technical Program, Keynote Talks, Workshops and Poster session will be held on the following three days. All of these (except Workshops and Posters) will be available via real-time streaming in the US Central Time zone with virtual attendees having Q&A access to the presenters. For those virtual attendees who cannot watch the live presentations, the material will be available on demand to all attendees for a month after the symposium with the ability to communicate with the authors.

In 2020, we were planning on co-hosting the International ESD Workshop (IEW) ESD workshop when the COVID-19 pandemic hit. For 2022, IEW will be seamlessly embedded into the IRPS Program and will sponsor three tutorials, an invited talk, two technical sessions and two evening workshops focused on ESD and latch-up. And we continue our
collaboration with our sister conference, European Symposium on Reliability of Electron Devices Failure Physics and Analysis (ESREF) by hosting their Best Paper and the International Integrated Reliability Workshop (IIRW) by hosting their Best Student Paper.

Our primary objective is to maintain the symposium’s leadership role in the reliability physics of microelectronic devices by attracting leading researchers to present their work and providing attendees the best place to access this information. With all the buzz in the media about whether Moore’s Law has hit its limit, IRPS has been promoting expertise developed in silicon-based reliability over the past sixty years and expanding into new material areas. This year, eight of the technical sessions are devoted to reliability in topics outside of traditional silicon, including wide bandgap GaN/SiC, emerging memory and neuromorphic computing. I hope our ability to draw these communities together will accelerate the cross-fertilization of ideas. 

The Technical Program consists of four keynote speakers, twenty-three invited speakers and eighty-seven oral presentations organized in thirty technical sessions on eighteen reliability topics. Over two evenings, there will be ten Workshops and sixty-six Poster presentations that are designed to allow in person attendees and experts to interact
with one another. With eighteen tutorials covering topics ranging from fundamental transistor and memory reliability all the way up to automotive and complex system-level reliability, this year’s symposium provides an excellent learning opportunity for engineers and scientists new to reliability as well as experienced individuals wanting to explore new
areas. The Year in Review, which serves as a summary of research in the past year, will cover 3D packaging, emerging memory and aging aware circuit designs.

Finally, I would like to express my extreme gratitude to our patrons and exhibitors, whose support makes IRPS possible.
And to all of you, our in person and virtual attendees, for supporting this symposium for sixty years!

**Charles W. Slayman, General Chair** 
**of 2022 IRPS Management Committee**
 
**About IRPS**

The IEEE International Reliability Physics Symposium (IRPS) is the premiere conference for engineers and scientists to present new and original work in the area of microelectronics reliability. Drawing participants from the United States, Europe, Asia, and all parts of the world, IRPS seeks to understand the reliability of semiconductor devices, integrated circuits, and microelectronic assemblies through an improved understanding of both the physics of failure as well as the application environment. IRPS provides numerous opportunities for attendees to increase their knowledge and understanding of all aspects of microelectronics reliability, and to meet and network with reliability colleagues from around the world.

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IRPS 2022 Main Conference 

IRPS provides numerous opportunities for attendees to increase their knowledge and understanding of all aspects of microelectronics reliability. It is also an outstanding chance to meet and network with reliability colleagues from around the world.

tutorial

**IRPS 2024 Tutorials were held in Dallas, Texas from April 14 to 15, 2024. The IRPS Reliability Year in Review (YIR) session consisted of three presentations reviewing the past year's reliability work by experts in the field for areas of high interest. It was a nice augmentation to the tutorials sessions immediately preceding and attendees were able to obtain keen reliability insights in short amount of time.** 

[![](https://assets.underline.io/uploads/markdown_image/1/image/31e631d9941728874f1cea6ddf221cd4.png)](https://underline.io/events/445/reception)
[![](https://assets.underline.io/uploads/markdown_image/1/image/a6a3fb1b1830527791842ee5c8f13e6c.png)](https://www.irps.org/)
[![](https://assets.underline.io/uploads/markdown_image/1/image/35139d437e3e8a3413aa4c1f0d2c5400.png)](https://drive.google.com/drive/folders/1Iy0QiBLQlf17nt_xBrqLLvY9_rPaFhDn?usp=sharing)
 

**[IRPS 2024 eGuide](https://drive.google.com/file/d/1DHxkWbafodK_D2HlDi7lwRK7KatgBgBD/view?usp=drive_link)**
Please save the zip file locally and click the "start.pdf" to view the file. 

**IRPS 2024 General Chair Welcome Message**

On behalf of the Management Committee of the IEEE International Reliability Physics Symposium (IRPS) and the IRPS Board of Directors, it gives me great pleasure to extend a warm welcome to all who are planning to attend the IRPS 2024, scheduled to take place from April 14-18, 2024, in Dallas, TX. 
Over its 62-year history, IRPS has solidified its position as the premiere conference for engineers and scientists to present new and original work in the field of microelectronics reliability. Drawing participants from the United States, Europe, Asia, and other parts of the world, IRPS aims to deepen our understanding of reliability of semiconductor devices, integrated circuits, and microelectronic assemblies through an improved understanding of both the physics of failure as well as the application environment. IRPS offers diverse opportunities for attendees to enhance their knowledge and understanding of all aspects of microelectronics reliability. It is also an outstanding chance to meet and network with reliability colleagues from around the world.

The IRPS 2024 technical activities will begin with two days of a total of twenty tutorial sessions covering a broad spectrum of emerging reliability topics beyond CMOS device, circuit and system reliability. These sessions are devoted to both newcomers as well as experts. Three reliability Year in Review (YIR) talks focusing on neuromorphic computing, dielectric breakdown in leading edge devices, and GaN technology will be provided on Monday after the tutorials.

The IRPS 2024 technical program will feature four distinguished keynote talks in the plenary sessions delivered by Prof. Shinichi Takagi from The University of Tokyo and Dr. Su Jin Ahn from Samsung on Tuesday, Dr. Rajeev Malik from IBM on Wednesday, and Dr. Sameer Pendharkar from Texas Instruments on Thursday. The technical program, organized into three parallel tracks, consists of contributed and seventeen invited papers from leaders in industry and academia. Additionally, two invited talks by recipients of paper awards from our sister conferences, European Symposium on Reliability of Electron Device Failure Physics and Analysis (ESREF) 2023 and the International Integrated Reliability Workshop (IIRW) 2023, will be given in the technical program. 

Tuesday evening will host ten workshops, offering an opportunity for in-depth, face-to-face discussions on emerging reliability challenges, including the three IRPS 2024 focus topics. A poster session will be held in the Austin Ranch outside the symposium building on Wednesday evening. Both events are sure to be lively. The IRPS 2024 and the International ESD Workshop (IEW) will be co-hosted with IEW registrants participating in both IRPS and IEW programs.

The IRPS 2024 will adopt a hybrid conference style, allowing virtual access to live oral presentations hosted by the Underline. Real-time streaming of all technical events (excluding Workshops and Posters) will be available in the US Central Timezone, providing virtual attendees with Q&A opportunities. For those virtual attendees who cannot watch the live presentations, the material will be available on demand to all attendees after the symposium. All authors will be presenting in person.

Finally, I would like to extend my extreme gratitude to our patrons, exhibitors, and all participants for their invaluable support, which makes IRPS successful. 

Please enjoy the IRPS 2024!

Koji Eriguchi, General Chair 
of 2024 IRPS Management Committee
 
**About IRPS** 

The IEEE International Reliability Physics Symposium (IRPS) is the premiere conference for engineers and scientists to present new and original work in the area of microelectronics reliability. Drawing participants from the United States, Europe, Asia, and all parts of the world, IRPS seeks to understand the reliability of semiconductor devices, integrated circuits, and microelectronic assemblies through an improved understanding of both the physics of failure as well as the application environment. IRPS provides numerous opportunities for attendees to increase their knowledge and understanding of all aspects of microelectronics reliability, and to meet and network with reliability colleagues from around the world.

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To access the site please register [**here**](https://www.irps.org/registration-fees). 

Please register!

The IEEE International Reliability Physics Symposium (IRPS) is the premiere conference for engineers and scientists to present new and original work in the area of microelectronics reliability. IRPS seeks to understand the reliability of semiconductor devices, integrated circuits, and microelectronic assemblies through an improved understanding of both the physics of failure as well as the application environment. 

In this talk, we will cover the front-end reliability aspects and challenges that come along the imminent shift towards Gate-All-Around based MOSFETs architectures in cutting-edgelogic technologies. Additionally, we explore innovative architectural derivatives, like Forksheets FETs, towards continued logic cell downscaling. The tutorial extends to the distinctive integration challenges posed by these devices, and we will examine their impact on both time-zero and time-dependent performance, including dielectric walls for N-to-P separation and device substrate isolation.

Reliability Aspects of Nanowire, Nanosheet and Forksheet Devices

Thanks to its superior switching properties, GaN is penetrating several power applications resulting in highest efficiency and system miniaturization. In this seminar, we’ll review the key device technologies (e-mode and cascode) and discuss their trade-offs between performance and reliability. We will show how to achieve high voltage rating up to 1200V and short-circuit capability up to 5 microseconds. The main topologies and applications will be presented, discussing good practices to use GaN fast, but reliably.

GaN Power Device Technology and Reliability

This tutorial covers 6 main topics:

Basic data types used in the field of reliability

Basic distribution functions and its application

Main lifetime models, their use and their properties

Basic fitting methods used in fitting reliability data to the most suited distribution and lifetime model

Basic ways to display distributions, lifetime models and their fits

Some more advanced statistical models to account for variability issues in advanced devices

Introduction to Statistics for Reliability

This tutorial will cover basic mechanisms, differentiating between transient and permanent shifts in threshold voltage (VT), and discussing the impact of such instability on device reliability and performance. Specific topics will include: VT shift versus VT drift and hysteresis, and how to measure both static and dynamic instability; dependence on measurement speed, bias, and temperature; degradation and VT shift; bias-temperature stress degradation; gate-switching (AC) stress degradation; dynamic on-state resistance; and other related effects and analysis.

Threshold-Voltage Instability in SiC MOSFETs

The growing complexity of today’s automotive vehicles goes side by side with increasingly stringent and multifaceted safety requirements. Just like electromechanical systems in a car, semiconductor components now need to demonstrate high levels of reliability against a variety of failure modes, out of which radiation effects could arguably be among the most unpredictable at system level. While cosmic-ray induced errors may be rare at sea level, the sheer number of land vehicles in a manufacturer’s….

New Industrial Radiation Paradigms for LEO Satellite Constellations, Full Autonomous Car Driving and Sovereign 3D Chiplets

Recent advances in automotive SOCs, AI accelerators, and HPC engines in data centers have led to an explosion in the adoption of emerging technology nodes and 3DIC/chiplet packages. We will discuss the resiliency challenges for these emerging SOCs, and optimizing the SOC health using prognostics, test and analytic solutions, utilized for managing silicon lifecycle (SLM) for improving quality and yield; and also address aging and degradation challenges for improved RAS and functional safety.

Silicon Health &amp; Lifecycle Management, for Data Center and Automotive

3D NAND flash memory is pivotal for large-scale data storage and finds application in aerospace and defense. However, the harsh environmental conditions pose several reliability challenges for 3D NAND, including radiation-induced data corruption and cross-temperature reliability issues. In this tutorial, I will introduce a framework to understand radiation effects on flash memory and present three techniques—electrostatic shielding, defect engineering, and watermark storage—to mitigate radiation effects on commercial 3D NAND.

Reliability Challenges of 3D NAND Flash Memory in Harsh Environments

Moving along in parallel with the emergence of ever stronger artificial intelligence, the development of next generation AI hardware which harnesses the unique properties of physical systems, beyond classical digital computing, has been continuously evolving. AI scientists, in the pursuit of lower energy costs and smaller model sizes, have already been willing to make compromises on model accuracy for improved performance in edge applications. In the case of novel AI hardware, trading off the reliability of digital systems for the reduced energy cost of analog and neuromorphic systems, presents new opportunities for exploring the same technology space as current efforts in edge inference. In this lecture, we will briefly review the foundations of modern AI from the perspective of loss function minimization, and explore how physical systems mathematically interact with this loss landscape. In doing so, we will explore how scientists this past year have been balancing the tradeoffs from device defects, analog noise, variability, and other phenomenon to develop next generation systems for AI inference as well as how to understand these developments using the mathematical tools employed by AI scientists. 

From the Mathematical Foundations to the Physical Models: A Year in Review of Neuromorphic Reliability

The engineering community has provided improvements in power, performance and area by developing device types such as nano-sheet field-effect transistors and Indium Gallium Zinc Oxide thin-film-transistors. Moreover, we have improved the gate and middle-end-of-line dielectric reliability in these various structures using methodology such as a novel circuit/measurement technique which allows collection of more statistically relevant data. Advances have been made in our ability to predict time-dependent dielectric breakdown despite process-driven variations. In addition, the drive to understand and predict dielectric reliability under actual field operation conditions has led to AC (even up to the GHz range) and drain-bias measurements, resulting in enhanced understanding of the complexity and applicability of these evaluation techniques. While transistors can function and meet performance specifications even after soft breakdown, some power MOSFETs fail performance metrics even before reaching the point of gate dielectric breakdown. Research achievements in Power MOSFET TDDB will be covered along with a new JEDEC standard, JEP194: Guideline for Gate Oxide Reliability and Robustness Evaluation Procedures for Silicon Carbide Power MOSFETs, published in 2023. Furthermore, we have made headway in interpreting the testing results of dielectrics in memory devices, which enables more accurate extrapolation from test to use conditions.

Dielectric Breakdown: Advances in Characterization Techniques and Extrapolation to Use Conditions for Low and High-Voltage FETs

We find ourselves in an era marked by a global push towards electrification, with a particular emphasis on reliability. The ongoing transformation in transportation, matching the impact of the internal combustion engine, is complemented by the increasing intelligence and affordability of smart devices across various domains, fueled by the Internet of Things (IoT). The advent of robotics and autonomous vehicles promises to revolutionize our daily lives. Within this technological surge, the commitment to achieving a carbon-free energy system by 2050 underscores the need for highly reliable energy-efficient electronics at every level. A pivotal path that Gallium Nitride and Silicon Carbide technology have demonstrated is higher power density at the device level that can be tranlasted towards system level as well. The roadmap to success hinges on the successful integration of GaN and other WBGs into circuit boards to drive diverse applications. However, the journey has not been seamless, particularly with GaN transistors, which have not provided a plug-and-play experience. Realizing the theoretically-predicted efficiencies from a WBG-driven system often necessitates modifications, ranging from adjustments in power modules to complete circuit topology reinventions. Operating conditions optimized for WBG devices can introduce risks, with parasitic devices in integrated circuits posing threats such as latch-up, electrostatic discharge (ESD), and other high-field phenomena like avalanche. Understanding and addressing these challenges are crucial for ensuring the functional security of systems, especially under extreme operating and environmental conditions. The success of gallium nitride technology in RF has been steady and paved its way towards 5G/6G alongside Silicon. Adding more power density at higher frequencies at higher operating temperatures, without degrading the efficinciy of amflifiers has been the key driver that sets GaN apart from its competitors. Need for more power density has paved the way for exploration into hetergenous integration with diamond and AlN for thermal management. 

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Reliability Aspects of Nanowire, Nanosheet and Forksheet Devices

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