United States

Aluminum nitride (AlN) is considered a future candidate for the future power electronics applications for its wide bandgap (6.2 eV), high thermal conductivity (340 W/mK), and high breakdown field (~12 MV/cm). However, due to the challenges in material growth and device fabrication, very limited work has been reported on AlN electronics, and the full potential of AlN material is yet to be discovered. The impact ionization (II) coefficients, which determine the blocking limits of AlN power devices is still both experimentally and theoretically imprecise but is under study at present. Here we collected the different II coefficients reported in the literature and analyzed their impacts on the device performance with TCAD Silvaco. The quasi-vertical AlN Schottky diode is simulated in Silvaco TCAD environment. Selberherr’s II model is employed to analyze the breakdown performance of the device as: αn,p=an,pexp(-bn,p/E) Where α is the II coefficients, E is the electric field, and a, b are the parameters need to be determined. 3 II coefficients are collected from the theoretical results reported, which have a large discrepancy: one calculated from the full-band Monte Carlo model in E. Bellotti et al. [1], one calculated from the ensemble Monte Carlo framework in C. Bulutay et al. [2], and one in N. Lophitis et al. [3]. and another one coefficient is determined by calibration to have a breakdown field of 12 MV/cm. The drift region thickness (W) is set to be 1 mm and the N-type doping concertation (Nd) is set to be 1017 /cm3. A 100 nm SiO2 passivation is employed to optimize the blocking capabilities. The 4 coefficients are applied to the model and their impact on the device performance are analyzed with the simulation. The breakdown voltages (BV) for the 4 II coefficients are 351, 355, 2090, and 527 V respectively. The discrepancy of the II coefficients also affects the electric field distribution while the breakdown fields for the 4 II coefficients are 8.8, 8.8, 43, and 12 MV/cm respectively. The distribution of the electric field in the devices shows the breakdown occurs due to EF crowding at the anode edge, however, it is alleviated by SiO2 passivation structure. [1] J. Appl. Phys. 111, 103711 (2012). [2] Semicond. Sci. Technol. 17, L59 (2002) [3] Disruptive Wide Bandgap Semiconductors, Related Technologies, and Their Applications. (2018)

EMC 2023

Effect of Impact Ionization Coefficients on High-Voltage Vertical AlN Power Devices

aln power device impact ionization coefficient

The Electronic Materials Conference (EMC) is the premier annual forum on the preparation, characterization and use of electronic materials. This year’s event will feature a plenary session, topical sessions, a poster session and more.

EMC is coordinated with the Device Research Conference (DRC). This recognizes the strong interaction between device and electronic materials research and provides fruitful exchange of information between attendees of both Conferences.

The Electronic Materials Conference (EMC) is the premier annual forum on the preparation, characterization and use of electronic materials. 

technical paper

Lateral epitaxial overgrowth (LEO) enables lithographically patterned dielectric features to be embedded within single-crystal semiconductor materials. InP-based photonic crystal surface-emitting lasers (PCSELs) take advantage of the index contrast created by periodic arrays of encapsulated voids while avoiding the challenges of growing distributed Bragg reflectors at this lattice constant [1]. LEO on photonic crystals (e.g., arrays of triangles) requires coalescence from multiple crystal fronts, which can introduce pits, as well as threading dislocations (TDs) and stacking faults (SFs) [2]. In this work, we demonstrate selective InP nucleation and coalescence on patterned InP substrates with designed feature sizes of 266-1110 nm by solid-source molecular beam epitaxy (SS-MBE). Despite the lack of lattice mismatch, we find that extended defects form before the completion of coalescence in all cases and that LEO on smaller features with sides aligned away from [0 -1 1] and [0 1 1] directions favors lower defect densities. InP substrate patterning started with 40 nm of SiN deposited by PECVD and patterned by e-beam lithography. Reactive ion etching left arrays of SiN isosceles-right triangles with side lengths of 465-1110 nm and polygons with a side length of 266 nm. The sides of the triangles were aligned along [0 -1 1] and [0 1 1] crystallographic directions, while the sides of the polygons spanned a wide range of directions. We found a pre-growth cleaning procedure consisting of O2 plasma ashing and wet cleaning in uncut (98 wt%) H2SO4 to enable InP surface morphologies matching those on epi-ready wafers. Samples consisting of 20 and 350 nm of Be-doped InP (1018 cm-3) were grown on patterned n-InP at an elevated substrate temperature (Tsub) of 500°C and a low growth rate of 0.2 μm/hr to encourage selectivity [3]. Thicker samples of 1300 nm p-InP were initiated using the same conditions for the first 500 nm, followed by a second growth step at more typical InP MBE growth conditions of 440°C, 1 µm/hr. InP growths of 20 and 350 nm at Tsub = 500°C show good selectivity, as no polycrystalline nucleation was found on the dielectric regions. After 350 nm of growth, coalescence was completed over the 266 nm polygons, while an array of small pits was observed over the 1110 nm triangles. After 1300 nm growth, the InP surface was fully coalesced, regardless of feature size, with small, enclosed voids above the SiN patterns. Despite the excellent selectivity, we have found that Tsub = 500°C leads to rough InP surfaces, and the rms roughness of the coalesced films was ~30 nm due to high densities of hillocks. Using electron channeling contrast imaging (ECCI), we find that InP LEO on the 266 nm polygons shows the lowest density of extended defects. 1300 nm overgrown InP on the 266 nm polygons had a TDD of 5.0 × 106 cm-2, which is an order of magnitude lower than on the 465 and 1110 nm triangle patterns. Stacking fault density (SFD) decreases by nearly 10× as the feature size decreases from 1110 to 266 nm. At a pattern size of 1110 nm, ECCI reveals an unexpectedly asymmetric distribution of SFs with [0 -1 1]-oriented SFs over every buried triangle and virtually no [0 1 1]-oriented SFs. Consistent with the ECCI results, we find that overgrown InP on 266 nm polygonal patterns exhibits 3.9 and 1.6× greater photoluminescence intensity than on 465 and 1110 nm patterns, respectively. Future work will focus on reducing surface roughness while maintaining selectivity and on better understanding the effect of pattern geometry on the formation of extended defects. References [1] K. Hirose, Y. Liang, Y. Kurosaka, A. Watanabe, T. Sugiyama and S. Noda, Nat. Photon 8, 406–411 (2014) [2] D. J. Ironside, A. M. Skipper, A. M.García and S. R. Bank, Prog. Quantum. Electron. 77, 110316 (2021) [3] M. Fahed, L. Desplanque, C. Coinon, D. Troadec and X. Wallart, Nanotechnology 26, 295301 (2015)

InP Lateral Epitaxial Overgrowth by Solid-Source Molecular Beam Epitaxy

Magnetic topological insulator could achieve quantum anomalous Hall (QAH) effect and spin-orbit torque (SOT) switching in the same structure. This is promising for its future applications in memory or switching applications with its robust surface properties by topological protection. In this work we have grown Cr:(BixSb1-x)2Te3 and MnBi2Te4 on GaAs (111) substrate through modulation doping by MBE (Molecular Beam Epitaxy). The doping level and the thickness of each layer is examined to tune the bandgap and the Fermi level of the whole sample. In this way, we can tune the Fermi level into the bandgap and optimize the total resistivity to achieve quantization. Considering the van der Waals nature of the epitaxial layers, it has very weak van der Waals bonding with the substrate. This gives rise to a quasi Van der Waals epitaxial growth mode at the interface of GaAs (111) and epitaxial layers. In this growth mode strain relaxes quickly within the 1st epitaxial layer. Growth mechanism and the influence on its transport properties are also discussed.

Quasi Van der Waals Epitaxy of Magnetic Topological Insulator on a GaAs (111) Substrate

Bismuth (Bi)-containing III-V semiconductor materials are attracting considerable interest due to their predicted non-trivial topological surface states and band inversion. These topological surface states (TSSs) have their spin locked with orbital momentum because of large spin-orbit coupling, presenting the high charge to spin conversion efficiency and application in spintronics. [1, 2] Previously, either Bi1-xSbx bulk growth was studied, [3] which is hampered by low Bi incorporation, or the focus was set on the growth of metallic Bi films on top of semiconductor substrates, [4] without highlighting the Bi-substrate interaction. However, it is vital to experimentally investigate the Bi-semiconductor interface and the potential formation of Bi-induced topological surface states, not just for spintronics application but also from the fundamental physics point of view. Here, we investigate the incorporation of Bi atoms into the semiconductor surface, thus increasing the local Bi content in the semiconductor and forming atomic-scale heterostructures in a controlled way. We will present multiple steps of Bi incorporation in the InSb(111)B surface using a combined study of scanning tunneling microscopy (STM), X-ray photoemission spectroscopy (XPS), and low energy electron diffraction (LEED). After cleaning the InSb(111)B surface from native oxide using atomic hydrogen, STM shows a 3X3 reconstruction, in agreement with previous studies. [5] We observe that Bi incorporation on a heated InSb(111)B substrate (Ts=250 C) initiates by forming a buckled triangular atomic arrangement. XPS of the Bi 5d core-level shows that Bi interacts with Sb by forming Bi-Sb bonds. Interestingly, the incorporation is self-limiting, i.e., the amount of Bi in a Bi-Sb configuration remains unchanged irrespective of deposition cycles for the heated sample. Further deposition of Bi at room temperature (RT) instead results in multi-layer thick Sierpinski-type defective triangles [6] comprising mainly metallic Bi. However, the Bi incorporation under the before-mentioned conditions occurs predominantly at random sites on the surface, hindering the formation of a large-scale symmetric surface layer. However, when Bi was deposited at RT, followed by an annealing step at 250 C for 15 minutes, a periodic (2X2) reconstructed surface was observed. XPS indicates that also this ordered 2X2 surface is characterized by Sb-Bi bonding, similar to the chemical state of the surface that results from Bi deposition at Ts=250 C (as mentioned above). Similar 2X2 reconstruction can be obtained if the sample is annealed (at Ts= 250 C) in-between any Bi deposition conditions. That shows that Bi bonded to Sb tends to stabilize in a 2X2 periodic surface structure of self-limiting bonding configuration. In summary, we present the formation of a controllable and ordered, atomically thin Bi-Sb layer on InSb which is highly promising for realizing 2D topological insulators on III-V semiconductor substrates. References: [1] S. Fragkos et al., Phys. Rev. Materials 5, 014203 (2021) [2] T. Campos et al., Phys. Rev. B 97, 245402 (2018) [3] D. Hsieh et al., Nature 452, 970 (2008) [4] Z. Liu, et al., Phys. Rev. Lett. 107, 136805 (2011) [5] J. Wever et al., Surf. Sci., 321, L225 (1994) [6] C. Liu et al., Phys. Rev. Lett., 126, 176102 (2021)

Self-Limiting Formation of Bismuth-Induced Nanostructures on the InSb(111) Surface

The 2D TMD-based thin film materials have been believed to be a potential candidate for replacing the Si CMOS technology. Ideally, the 2D material has better device scaling and interface properties. However, contact resistance has been a big issue in the transistor's design due to the difficulties in material doping. It is difficult to dope in 2D material in the contact region to reduce the contact resistance and form an ohmic contact. Hence, most of the work is to find a good metal to adjust the work function. For nMOSFET, a smaller work function material is needed, and a high work function metal is needed for p-MOS. In this work, a new CFET design based on 2D Janus MoSSe material has been proposed based on the polarization field induced by the asymmetric structure. The 2D Janus MoSSe material has been found to have a strong polarization field, which is even larger than the nitride-based polar material because the structure is asymmetric. The p-type and n-type ohmic contact can be formed at the opposite surface by utilizing the asymmetry polarization property of the two opposite surfaces. The positive polar charge surface will attract electrons to form a 2DEG at the surface and make the n-type ohmic contact. The negative polar charge surface will attract holes to form a 2DHG and a p-type ohmic contact. Based on these properties, the n- and p-FET can be produced without doping; combined into a CFET by symmetric structure. In our DFT calculation, the dipole fields are up to 106 V/cm order (Table 1) for both MoSSe and WSSe. The DFT calculated projected band structures of 1 and 2-layer-MoSSe/graphene systems with different side contact are calculated to show the p- and n-type contact formation (Fig.1). If graphene makes contact with the Se-side, the 0.2 eV N-type Schottky barrier is formed. And yet, if graphene makes contact with the S-side, we see a 0.3 eV P-type Schottky barrier. In the 2-layer MoSSe case, we find that the N-type barrier for S-side contact is reduced to 0.1 eV, and the Se-side achieves p-type ohmic contact. The intrinsic dipole-induced p- and n-type ohmic contact can also be formed at the metal/MoSSe interface. The DFT extracted data, such as spontaneous polarization and thickness, are further put into the 2D finite difference Poission-Schrödinger solver developed by our lab to design the transistor. Similar to the GaN HEMT devices, this intrinsic dipole in MoSSe material causes band bending, producing 2DEG and 2DHG at the interface region (Fig.2). Thus, the p-FET and n-FET structures are constructed by placing a channel region between two Metal/MoSSe interfaces through attaching contacts to the different faces of JTMD. Then combining p- and n-FET, the CFET structure can be fabricated using a single film. Based on the above-mentioned property, we design the p- and n-FET structure shown in Fig.3 and Fig. 4 and perform the simulation. The double gate structures are used to have better control of the channel. To make the enhanced mode of operation, the HfO2 material was chosen as the gate dielectrics. The device achieves a smaller SS value (~61 mV/dec) (Fig.5 and Fig. 6). Fig. 7 is the majority carrier density plot with different gate biases, the switching between on and off states can be observed. Furthermore, to make the device fabrication process realistic, we proposed a structure that could be built layer by layer (Fig.8). Based on the I-V curve obtained from the 2D simulation result, we built the model and further performed the circuit simulation by LTspice (Fig.9). Set VDD equals to 1.5V, and the middle plot is Vin to Vout of the CMOS inverter. The JTMD materials have a similar transport property as MoS2 and WS2. With the built-in polarization field and a proper design, it is possible to make CFET devices in a single thin film without doping.

Surface Polarization Engineering Design of 2D Janus MoSSe Complementary Field Effect Transistors

We report our initial results on the fabrication and characterization of 2D materials/III-As semiconductors heterostructures in a planar and helical geometry. These materials promise to support the generation of cyclotron THz radiation with technologically relevant levels of power density (i.e., between 100s mW/cm2 and few W/cm2) under an applied DC bias. An intuitive approach based on a time-of-flight and interference argument shows that radiation frequencies in the THz range are expected from helices with a radius ranging from a few tens to a few hundred nanometers. The exceptional compliance of 2D materials allows them to bend with nanoscale radius curvature without any plastic deformation. A 2D material with high carrier mobility is also required to limit carrier scattering within the helices and thus reduce spectral broadening around the center frequency. h-BN/graphene/h-BN heterostructures will potentially satisfy all the desired attributes to generate cyclotron radiation based on previously reported values of carrier mobility. We create the helical ribbons via guided self-assembly of graphene-based/GaAs/InxGa1-xAs heterostructures with a thickness of ~2-20 nm. This process enables the fabrication of nanoscale-diameter structures whose dimensions can be precisely manipulated in that they depend on residual strain in a nanosheet, its stiffness, and its geometry in the plane perpendicular to its thickness. These are all parameters that can be readily controlled via top-down processing techniques. In our work, multi-layer stacks comprising a GaAs/InxGa1-xAs bilayer and an AlAs sacrificial layer are deposited by molecular beam epitaxy on a (001) GaAs substrate surface. Materials combinations and growth conditions are appropriately selected to establish a large strain gradient across the thickness of the III-As bilayer. We then fabricate h-BN/graphene/h-BN heterostructures on the semiconductor bilayer via polymer-assisted release, transfer of the 2D materials, and vacuum annealing in Ar atmosphere to remove the polymer support. X-ray photoelectron spectroscopy characterizes the removal of the polymer during annealing. Next, the 2D materials/GaAs/InxGa1-xAs nanosheets is patterned into ribbons at a non-zero angle with the softest crystallographic direction in GaAs. Selective etching of the AlAs sacrificial layer results in the nanosheet bending and twisting towards the softest crystal direction (i.e., <100>). We have fabricated structures with a scalable diameter between 30 nm and 800 nm, as estimated by scanning electron microscopy. In addition to illustrating the controlled synthesis of graphene helical ribbons, we present magnetotransport and multi-carrier analysis techniques to characterize mobilities and carrier concentrations in the fabricated heterostructures. A precise knowledge of these parameters will improve our predictive capability of the electromagnetic radiation originated by accelerated charges along the helical path. We fabricate graphene-based/GaAs/InxGa1-xAs Hall bar devices on AlAs-coated substrates and perform variable temperature magnetotransport on a Quantum Design Magnetic Properties Measurement System (MPMS). Multi-carrier analysis techniques are used to shed light on the dominant carrier scattering mechanisms and surface transfer doping of encapsulated graphene on III-As nanosheets. ACKNOWLEDGEMENT. This work was supported by the U.S. AFOSR/Clarkson Aerospace Corporation through award No. FA9550-21-1-0460/UNM 21-1-0460.

Graphene/III-As Nanosheets—Self-Assembly, Electrical Transport and Potential for THz Generation

Two-dimensional transition metal dichalcogenides (2D TMDs) have been extensively studied in recent years due to their remarkable electronic, optical, and mechanical properties. Their ability to withstand high levels of strain without fracture makes 2D TMDs attractive candidate materials for devices such as quantum emitters and wearable energy harvesters. This same ability, however, can have pronounced effects on device performance when unintentional sources of strain cause property changes via deformation potentials and electromechanical coupling. One such source of strain is nanobubbles, which are ubiquitous in mechanically exfoliated 2D samples. When using piezoresponse force microscopy (PFM) to measure the flexoelectric effect in 2D TMDs, we observed that nanobubbles showed greatly enhanced electromechanical coupling compared to flat regions, beyond the difference expected due to the absence of substrate pinning. Measurements of flexoelectric moduli in ostensibly flat monolayers may therefore yield overestimates due to the inclusion of nanobubbles in the analyzed area. Our PFM measurements show consistent reduction in the calculated effective flexoelectric coefficient when the data are filtered to exclude nanobubbles, resulting in a more accurate value for unstrained material. We have also used PFM to characterize the detailed influence of strain, via nanobubbles in exfoliated MoS2 monolayers, on electromechanical behavior in monolayer TMDs, focusing in particular on strain-dependent enhancement of out-of-plane electromechanical responses. Small bubbles with diameters under 100 nm consistently produce enhanced piezoresponse compared to flat regions. Large bubbles with diameters on the order of hundreds of nanometers exhibit an unexpected PFM profile. Rather than increasing monotonically from perimeter to apex, the piezoresponse amplitude of large bubbles reaches its peak near the perimeter and subsequently decreases toward a local minimum at the bubble center. Combined with the calculation of the strain tensor by representing nanobubbles as thin plates and numerically solving the biharmonic von Karman partial differential equation, these results reveal a correlation between electromechanical response and strain derivatives. We posit that this correlation occurs due to their mutual connection to the local symmetry of the crystal. Within the bubble, the crystal’s mirror symmetry is broken, allowing one or more of the out-of-plane piezoelectric tensor elements to become nonzero. The enhanced electromechanical response associated with inhomogeneous strain is likely to have significant implications for a broad range of TMD-based 2D device structures due to the ubiquity of localized strain and the presence of band-edge energy shifts and electrostatic bound charges in those same features.

Effects of Strain and Local Topography on Electromechanical Coupling in Monolayer Transition Metal Dichalcogenides

SU-8 is widely used in a variety of applications for fabricating micro-scale or millimeter-scale structures due to its high viscosity, high optical transmission in the UV range, and excellent mechanical properties. The use of SU-8 for cryogenic applications has been limited because of possible internal stress in SU-8 films due to CTE mismatch with Si, the most commonly used material as a substrate, which can cause adhesion-related problems. We have developed a fabrication process of micro-scale SU-8 structures on a molybdenum (Mo) substrate using polyimide as an interfacial layer. Fabricated SU-8 structures showed good adhesion to the substrate from room temperature to cryogenic temperatures down to 4.2 K. Mo was chosen as a substrate due to its robustness, excellent mechanical strength, and compatibility with laser and CNC machining. SU-8 fabrication was done on 500-micron thick commercially available Mo wafers. The wafers were cleaned using an H2O2/H2SO4 “piranha” solution to remove organic material from the substrate. Atomic force microscopy (AFM) and scanning electron microscopy (SEM) was done before and after cleaning. SU-8 2075 was used to fabricate 250-micron tall structures with different aspect ratios on the Mo substrate. HD-4100 series polyimide was evaluated as an interfacial layer to improve the adhesion of SU-8 to Mo. Thermal shock tests were done using LN2 to test the adhesion of SU-8 with and without the interfacial layer. Shear tests were performed to characterize the adhesion of the SU-8 pillars to the substrate. The Mo wafers were laser-cut using a femtosecond laser to singulate them into pieces with SU-8 structures. These pieces were used as part of a superconducting interconnection scheme for multi-channel DC superconducting flexible cables, wherein the SU-8 structures provided self-alignment and distributed mechanical pressure over the contact area of the flexible cables. This interconnect scheme was demonstrated to be functional over multiple thermal cycles from room temperature to 4.2 K. The results of these experiments provide guidelines and motivation for using SU-8 with a polyimide interfacial layer in cryogenic system applications. Acknowledgment: We gratefully acknowledge funding and technical guidance from Microsoft for this work. We thank the Alabama Micro/Nano Science and Technology Center (AMNSTC) for providing access to fabrication and characterization facilities used in this work.

Fabrication of SU-8 Microstructures on Bulk Molybdenum Substrates for Cryogenic Applications

The need for higher power RF and energy conversion electronics has motivated the search for new device heterojunctions beyond what can be grown using conventional techniques. Instead, we can conceive of new material layer combinations that result in higher performance transport characteristics, e.g., channel conductivity, breakdown voltage, and heat dissipation. However, realizing a high-quality bonded interface has several challenges including the production and processing of low-defect thin material layers and reducing the interface trap density. Here, we have fabricated bonded n--GaN/p+-Si diodes to investigate the dependence of interface quality on surface pretreatments and post-bond annealing. Si-doped GaN films were grown on BN-sapphire templates [1] before being exfoliated using stressed Ni-spalling [2]. The GaN films were bonded top (Ga-polar)-side down onto (100) P-doped Si. IV and CV measurements were performed to characterize the transport across and the charge at the interface. Conducting scanning probe measurements were performed on the GaN surface to characterize the bond areal uniformity. These results are generally applicable to the optimization of interface properties for novel bonded junctions. [1] M. Snure, G. Siegel, D. C. Look, and Q. Paduano, J. Cryst. Growth 464, 168 (2017). [2] E. W. Blanton, M. J. Motala, T. A. Prusnick, A. Hilton, J. L. Brown, A. Bhattacharyya, S. Krishnamoorthy, K. Leedy, N. R. Glavin, and M. Snure, Small 17, 2102668 (2021).

Investigation of Bonded GaN-Si p-n Junction Interface Properties

Defying the isotropic nature of the conventional chemical etch, metal-assisted chemical etching (MacEtch) has allowed spatially defined anisotropic etching by using patterned metal catalyst films to locally enhance the etch rate of various semiconductors [1]. Significant progress has been made on achieving unprecedented aspect ratio nanostructures using this facile approach, mostly in solution. However, the path to manufacturing scalability remains challenging, because of the difficulties in controlling etch morphology including the minimization of porosity and aggregation, and etching uniformity. Taking MacEtch from liquid phase to vapor phase completely will eliminate surface tension, allow independent control of the partial pressure, injection timing and pattern of each etchant, while preventing the movement of the metal-catalyst films. Prior demonstrations of VP-MacEtch utilize thermally generated vapor by suspending the sample over a heated bath of either HF/H2O2 or HF with atmospheric O2 as the oxidant [2-4]. However, the presence of H2O2 in the vaporized solution serves to increase porosity with little impact on the etch rate compared to ambient oxygen [2,4]. The use of O2 as the oxidant limits the range of etching control, as the molar ratio may only be controlled through the dilution of HF. This approach leads to etch rates substantially lower (0.1-0.4 µm/min [1-3]) compared to the liquid phase (>3 µm/min [5]). Although increasing the concentration of HF does improve the etch rate, because of the fixed oxidant supply as the vapor flows across the sample the O2 becomes depleted leading to non-uniform etching and failure in pattern transfer. Here, we demonstrate a programmable vapor-phase MacEtch (VP-MacEtch) approach, with independent control of the etchant flow rates, injection and pulse time, chamber pressure and temperature, as well as UV irradiation. Silicon (Si) nanostructures are demonstrated with each of these parameters systematically varied synchronously or asynchronously, moving MacEtch closer to a manufacturing technique for versatile arrays of 3D Si micro and nanostructures.[6] Figure 1 presents a fully computer-controlled programmable VP-MacEtch system that operates under vacuum with an N2 carrier gas and representative structures produced, with unprecedented features. This work was supported in part by United States Army Research Office Award No. W911NF2110337 , National Science Foundation ECCS #2200651, and a gift from Lam Research. [1] X. Li and P.W. Bohn, “Metal-assisted chemical etching in HF/H2O2 produces porous silicon,” Appl. Phys. Lett., 77, 2572 (2000). [2] Hildreth, O. J., & Schmidt, D. R. (2014). Vapor Phase Metal-Assisted Chemical Etching of Silicon. Advanced Functional Materials, 24(24), 3827–3833. [3] Kim, J. D., Kim, M., Chan, C., Draeger, N., Coleman, J. J., & Li, X. (2019). CMOS-Compatible Catalyst for MacEtch: Titanium Nitride-Assisted Chemical Etching in Vapor phase for High Aspect Ratio Silicon Nanostructures. ACS Applied Materials and Interfaces, 11(30), 27371–27377. [4] Romano, L., Kagias, M., Vila-Comamala, J., Jefimovs, K., Tseng, L. T., Guzenko, V. A., & Stampanoni, M. (2020). Metal assisted chemical etching of silicon in the gas phase: A nanofabrication platform for X-ray optics. Nanoscale Horizons, 5(5), 869–879. [5] Balasundaram, K., Sadhu, J. S., Shin, J. C., Azeredo, B., Chanda, D., Malik, M., Hsu, K., Rogers, J. A., Ferreira, P., Sinha, S., & Li, X. (2012). Porosity control in metal-assisted chemical etching of degenerately doped silicon nanowires. Nanotechnology, 23(30), 305304. [6] Janavicius, L. L, Michaels, J. A, Chan, C., Sievers, D. J, Li, X. (2023). “Programmable Vapor-Phase Metal-Assisted Chemical Etching for Versatile High-Aspect Ratio Silicon Nanomanufacturing,” Apph. Phys. Rev. accepted.

Realization of Vapor-Phase MacEtch: Mechanism, Programmability and Scalability

Wireless interconnected devices have become ubiquitous, with many transformative applications emerging as sensor nodes that scale to smaller dimensions and higher node density. Energy harvesting for sensor systems at the millimeter-scale and microscale has become paramount, where functionality and system lifetime is determined by available power. Energy can be harvested through optical, radio-frequency, mechanical, piezo, thermoelectric and many diverse means [1]. Optical energy harvesting via photovoltaic cells scales efficiently down to the microscale, including sources from outdoor sunlight, indoor lighting, and near-infrared illumination (NIR ~ 850 nm, particularly for biomedical implantable sensors[2]). GaAs/AlAs photovoltaics (PV) provide high power conversion efficiencies for these sources across a broad range of optical spectra Furthermore, GaAs-based PV provides a platform for integrated optoelectronic devices that can be used for low-power optical communications. In this work, we present thin (<8 µm) GaAs PV cells for energy harvesting in microscale systems and heterogeneous integration approaches with low-power CMOS electronics. The PV cell structures consist of a single or dual-junction devices that were grown epitaxially by external foundries. Single junction devices are designed for optical response ranging from outdoor sunlight to 850 nm monochromatic illumination, where lateral series-connected devices may be fabricated to step up voltage output for energy harvesting. Dual junction “segmented” PV devices are designed for monochromatic illumination at 850 nm with target applications for bio-implantable systems. Devices were fabricated using previously established etching, photolithography, and metallization technologies. SiNx passivation layers are used on mesa devices, which also serve as electrical isolation for bonding pads metal interconnects. Fabricated devices are mounted epi-side down on glass substrates for substrate removal using wet chemical etching facilitated by an InGaP etch stop layer. A substrate transfer process is used to flip substrates to a sapphire substrate for device testing or flip chip bonding to silicon CMOS. Single junction and dual-junction PV devices show power density on the order of 1 µW/mm2 under mild 850 nm irradiation with an efficiency >20 %. Experiments using substrate removal utilized a new dual-junction epitaxial growth run where devices exhibited a diode blocking behavior attributed to an improper tunnel junction. Nevertheless, substrate removed devices exhibit power generation and integrity of electrical behavior for both frontside and substrate removed backside illumination. Further progress on substrate removed microscale PV harvesters and flip-chip bonding for device integration will be presented. The authors gratefully acknowledge the National Science Foundation award CBET-2129817 and the National Institute of Health award 1RF1NS128667. J. D. Phillips, Frontiers in Nanotechnology, 3, 633931, 2021 E. Moon et al, … J. D.Phillips, ACS Photonics 8, no. 5 (2021)

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InP Lateral Epitaxial Overgrowth by Solid-Source Molecular Beam Epitaxy

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