Spain

The increasing computational capacity of cyber‐physical systems (CPS) due to more powerful processors and, 
especially, multi‐core systems has caused their implementation in control systems to have a greater impact than 
initially expected. One of the consequences is the inclusion of a large number of CPS in the development of cars, 
airplanes, trains, etc. The need to reduce consumption, weight, wiring, etc., in these systems has led to the integration 
of the multiple functions performed in a system in a few computing platforms. In this line of development, 
hypervisors play a relevant role in the design, development and certification of the system. Hypervisors allow to 
integrate in the same computing platform the different functionalities that are performed in dedicated CPS. The aim of 
this presentation is to show that the use of hypervisors for CPS development presents fundamental advantages in the 
design, development and certification with respect to more traditional CPS systems.

AEiC 2021 - 25th Ada-Europe International Conference on Reliable Software Technologies

Why a hypervisor‐based approach is the best alternative for mixed‐criticality systems

Computational creativity is the art, science, philosophy and engineering of computational systems which, by taking on particular responsibilities, exhibit behaviours that unbiased observers would deem to be creative. As a field of research, this area is thriving, with progress in formalising what it means for software to be creative, along with many exciting and valuable applications of creative software in the sciences, the arts, literature, gaming and elsewhere.

The ICCC conference series organized by the Association for Computational Creativity since 2010 is the only scientific conference that focuses on computational creativity alone and also covers all aspects of it.


ICCC'20

The ICCC conference series organized by the Association for Computational Creativity since 2010 is the only scientific conference that focuses on computational creativity alone and also covers all aspects of it.
Computational creativity is the art, science, philosophy and engineering of computational systems which, by taking on particular responsibilities, exhibit behaviors that unbiased observers would deem to be creative. As a field of research, this area is thriving, with progress in formalizing what it means for software to be creative, along with many exciting and valuable applications of creative software in the sciences, the arts, literature, gaming and elsewhere.



keynote

[![](https://assets.underline.io/uploads/markdown_image/1/image/359fc42963be9dbef8d1acac451d7c3e.png)](https://www.ada-europe.org/conference2021)

### Welcome Message from our Co-Chairs

Through this message, we want to give you our warmest welcome to the 25th Ada-Europe International Conference on Reliable Software Technologies (AEiC 2021). The special circumstances we all go through have made the conference a virtual event. Nonetheless, this will allow us to take advantage of the benefits of this format by using the Underline.io platform that allows remote participation of speakers and attendees and a virtual exhibition.
The platform will also provide a virtual space through Gather.Town to facilitate social interaction among participants, which, in addition to presenting state of the art research results, is one of the most important goals of a conference. This platform will hold various social events together with breaks and a poster session. 

The conference schedule includes a four-day program and exhibition from Monday to Thursday, with parallel tutorials on Monday, and keynotes, technical sessions and a Work-in-Progress session on the remaining three days. The technical sessions include the presentations of 13 journal-track papers, 5 industrial presentations and 6 invited talks on leading topics on reliable software technologies. The program will be completed with three outstanding keynotes that will delight the participants.

The main conference activities will be from 13:00 to 18:00 Central European Summer Time (CEST) to allow participants from America to Central Asia to attend to the conference sessions. Virtual social events are scheduled at the beginning and the end of each day. We encourage you to participate in these activities as well as visiting the exhibition. We look forward to meeting you virtually in June 2021!

**J. Javier Gutiérrez and Mario Aldea Rivas**
 // AEiC 2021 Program Co-Chairs

![](https://assets.underline.io/uploads/markdown_image/1/image/609207a715bd5da2ea56e9a32b0d17ae.png)
![](https://assets.underline.io/uploads/markdown_image/1/image/5bd0a9396b4c6903d0ca52825b81fbe6.png)




Please register with AEiC to be able to enter the conference on Underline.io. If you have already registered, please login to Underline.io to be able to see full conference content. In case you do not have an Underline account, please create one. Thank you 

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Fuzion is a modern, general purpose programming language that unifies concepts found in structured, functional and object-oriented programming languages into 
the concept of a Fuzion feature. It combines a powerful syntax and safety features based on the design-bycontract principle with a simple intermediate representation that enables powerful optimizing compilers and 
static analysis tools to verify correctness aspects. 
Fuzion maps different concepts into the concept of a 
Fuzion feature and uses a simple intermediate language 
that is friendly for static analysis tools as well as for 
optimizing compilers. 
Fuzion was influenced by many other languages including Java, Python, Eiffel, Rust, Ada, Go, Lua, Kotlin, C#, 
F#, Nim, Julia, Clojure, C/C++, Scala, and many more. 
The goal of Fuzion is to define a language that has the 
expressive power present in these languages and allow 
high-performance implementation and powerful analysis tools. Furthermore, Fuzion addresses requirements 
for safety-critical applications by adding support for 
contracts that enable formal specification and detailed 
control over runtime checks. 
Keywords: safety, static analysis, programming language, certification

Fuzion – Safety through simplicity

The EDF (Earliest Deadline First) scheduling policy 
can take advantage of the existence of a synchronization 
clock mechanism to reach higher utilizations in 
distributed real-time systems, as indicated by 
theoretical research. In this work, we give the first steps 
to enable the usage of EDF and a global clock in a 
distributed system. To this end, our proposal relies on 
Linux to provide the global clock and on a Real-Time 
Operating System (RTOS) to provide the global EDF 
policy. The objective is the evaluation of global EDF to 
verify to what extent the theoretical results are met.

First steps towards an IEEE 802.1AS clock for EDF scheduling in distributed real-time systems

This paper presents the current status of the porting
of M2OS to the Arduino Uno board. M2OS is a small
real-time operating system targeted to
microcontrollers with very tight memory constraints.
M2OS provides support for a simple Ada tasking
model based on non-preemptive one-shot tasks. The
paper puts special emphasis on the adaptation of the
standard Arduino core library to be used by Ada
applications running on M2OS.
Keywords: Ada, Tasking, Arduino Uno, M2OS.

M2OS for Arduino Uno: Ada tasks and Arduino libraries working together

This paper presents the implementation of Queuing
Ports, a blocking communication protocol developed
for many-core architectures that perform a synchronized communication between cores without the need
of polling. This implementation has been performed on
M2OS-mc, a Real-Time Operating System (RTOS) that
has already been tested in the Epiphany processor. The
extension presented is based on the ARINC-653’s Queuing Port communication primitive and gives an alternative to the implementation based in the ARINC-653’s
Sampling Port communication primitive previously developed.1
Keywords: many-core, queuing-port, epiphany, task
synchronization, M2OS

Queuing ports for mesh based many-core processors

This paper describes the Ember library for highintegrity embedded robotics and GNC applications developed in SPARK 2014 with formal verification. The
library is based on generic packages and includes functionality as linear algebra, complex numbers, quaternions, and kinematics. Preliminary test results for linear
algebra performance are very promising.
Keywords: Numerics, robotics, embedded, SPARK

Ember: An embedded robotics library in SPARK

The Robot Operating System (ROS/ROS2) is a de facto standard in many fields of robotics research, with increasing 
presence in the industry. RCLAda is a binding to the ROS2 framework that enables programming for ROS2 in pure 
Ada with seamless integration into the ROS2 workflow. 
During this tutorial, participants will learn how to install ROS2 and RCLAda, the necessary basic information about 
the ROS2 build system and RCLAda integration, and will program basic examples and simulated mobile robots of the 
kind used in the DARPA Subterranean Challenge

Programming mobile robots with ROS2 and the RCLAda Ada Client Library

This tutorial presents the fundamental notions that make the development of safety‐critical software different from 
the development of more casual software. It presents the context, the applicable standards, and the techniques used 
for achieving high reliability. It explains why Ada and Spark are especially suited for writing safety‐critical software. 
Although required for demanding applications, the general principles that are detailed can be applied to, and help 
improve, all kinds of software development.

Introduction to the development of safety‐critical software

OpenMP is one of the most widely used frameworks for the development of parallel programs. OpenMP provides a set 
of annotations which allows for a compiler (or pre‐processing tool) to generate parallel code from sequential code (C, 
C++ or Fortran), as well as a runtime that manages the concurrency and parallel execution (usually on top of a 
multithreaded OS). 
The forthcoming revision of Ada specifies a lightweight parallel model, through a set of constructs that provide a guide 
to the compiler, to generate the required code for the parallel execution. This lightweight model maps well to one of 
the OpenMP approaches, which allows parallel Ada programs to execute on top of OpenMP runtimes, as well as roll‐ 
your‐own light‐weight thread schedulers. 
This tutorial will show how to develop Ada parallel programs, using both OpenMP as well as a light‐weight thread 
scheduler.

Parallel programming with Ada and OpenMP

The objective of this tutorial is to explain how to apply timing verification from design models at an early stage to 
verify their timing requirements, avoiding the late discovery of costly timing errors. The tutorial will introduce the 
tools and techniques used to produce design models that, though being useful for code generation, shall be also able to 
be trustily subject to a suitable form of timing verification. Depending on the severity of the need for verification the 
design models will be restricted and furtherly transformed so as to serve as input to either (hard) schedulability 
analysis, or (soft) simulation techniques. The seminar will address first a panoramic view of the field, then it will 
describe the concepts, languages, tools, and techniques involved, mainly related to the UML and MARTE standards, 
and finally show their application by means of a well‐known industrial case study from the avionics domain. In 
addition, pedagogical exercises will be proposed to the attendees to fix concepts and train the usage of the tools.

Timing verification from UML & MARTE design models: techniques & tools

Many multicore processors are capable to speedup computations with a significant magnitude, reducing for example 
to one hour some computation that would otherwise take an entire day to complete. The Ada programming language 
provides a high level and effective tool to speedup computations on multicore processors. The design of parallel 
programs starts with the granularity level of the parallelism with careful attention to memory management. We 
decide on the size of each job, check the mapping of jobs to threads, and on the location of the input and output data 
for each job. In the evaluation of parallel programs we tune the work load to reach the desired level of efficiency and 
throughput

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