United States

2D materials have gained attention for their resistive switching (RS). Platinum diselenide (PtSe2) stands out because it can be grown at CMOS back-end-of-line compatible temperatures and has excellent long-term stability. We present the first detailed study on forming free RS in PtSe2-based memristors using CMOS-compatible electrodes. We performed 45 bipolar switching cycles on four devices, finding a consistent switching ratio of 9. Excellent retention characteristics confirm the non-volatility of the RS for more than 3 days and 22 hours.

DRC 2022

Non-Volatile Resistive Switching in PtSe2-Based Crosspoint Memristors

2d materials

nonvolatile memory

memristor

resistive switching

neuromorphic computing


![](https://assets.underline.io/uploads/markdown_image/1/image/2e10c515564e9ec3287ee4c664011c20.png)

The energy cost of storing and moving data is enormous, and is growing at such a rapid pace that within a few years the power demand may overwhelm some developed nations. Non-volatile memory (NVM) and neuromorphic computing are enabling critical advances in this area, but there are many scientific and technological challenges. This conference will cover the materials challenges of different memory technologies, from the fundamental processes and mechanisms, to industry perspectives on materials specifications and manufacturing.

Materials Challenges for Memory

poster

[![](https://assets.underline.io/uploads/markdown_image/1/image/985c8a40b04e56675221c8549975de3c.png)](https://drive.google.com/file/d/1B70nPIeeeqdG4UU70NlYXuKVOHLRuJEo/view?usp=sharing)

### ** History of DRC**
The Device Research Conference (DRC) began in the pre-transistor era with the 1942 establishment of the Conference on Electron Device Research (CEDR). Following William Shockley’s 1948 CEDR presentation of the transistor device, the Solid-State Device Research Conference (SSDRC) was established, with invitation-only attendance.

In the ensuing decades, many exciting firsts were presented at SSDRC, including the use of impurity diffusion in silicon and germanium, the first practical MOSFET, and the first lattice-matched heterojunction.

In 1969, under the leadership or Herbert Kroemer and Cal Quate, the CEDR and SSDRC merged into DRC. In 1970, attendance was opened to all, and the first DRAM (dynamic random-access memory), room temperature lasers, and first CCD (charge-coupled device) were reported—all in the same 1970 DRC meeting!

1976 saw the first official coordination of tandem meetings between DRC and the Electronic Materials Conference (EMC) to bring together the electronic materials and device communities—a custom which persists to this day. In 1991, DRC began publishing its digest with IEEE; they can all be found [here on IEEE Xplore](https://ieeexplore.ieee.org/xpl/conhome/1000199/all-proceedings). Throughout this period, DRC featured reports of many novel and record-setting devices, including the HEMT (High Electron Mobility Transistor), VCSEL (Vertical Cavity Surface Emitting Laser), HBT (Heterojunction Bipolar Transistor), and nanoscale MOSFETs.

In recent years, DRC has continued to be the world’s premier forum to present innovative semiconductor device research with work on organic thin film transistors, graphene and carbon nanotube transistors, and 2D materials all featuring prominently in the 1990s through to the present day. In 2017, we celebrated DRC’s 75th anniversary with special sessions and an [article in the Journal of the Electron Device Society](https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8168249&isnumber=8232486). DRC technical topics continue to evolve with emerging device trends such as memory devices, quantum devices, optoelectronics/photonics, and wide bandgap power devices to reflect the exciting work being done by a diverse community of device engineers around the globe.

Today, as we look forward to the next 75+ years of device innovation, DRC continues to lead the way in showcasing top-caliber research, facilitating vibrant discussion and debate and acting as a platform to nurture the next generation of device engineers. We welcome you to join us at the next DRC!

To learn more about DRC's history, please see [Aaron Franklin, Debdeep Jena and Deji Akinwande, "75 Years of the Device Research Conference—A History Worth Repeating," in IEEE Journal of the Electron Devices Society, vol. 6, pp. 116-120, 2018. doi: 10.1109/JEDS.2017.2780778](https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8168249&isnumber=8232486).

### **Topics**
* Biological Devices
* Devices for Extreme Conditions
* Heterogeneously Integrated Devices
* Memory Devices
* Modeling and Simulation of Devices
* Nanoscale and Vacuum Devices
* Optoelectronic and Optical Devices
* Other Emerging Devices
* Power Devices
* Quantum Devices
* RF and Terahertz Devices
* Spintronic and Magnetic Devices
* Thin-film Devices
* Wide-bandgap Devices
 
### **Invited Speakers**
* Patrick Fay, University of Notre Dame
* Susanne Hoffmann-Eifert, Peter Grünberg Institute
* Sanghyeon Kim, Korea Advanced Institute of Science and Technology
* Sriram Krishnamoorthy, University of California, Santa Barbara
* Mario Lanza, King Abdullah University of Science and Technology
* Xiuling Li, The University of Texas at Austin
* Marko Radosavljevic, Intel Corporation
* Siddharth Rajan, The Ohio State University
* Giordano Scappucci, Delft University of Technology
* Fisher Yu, University of Arkansas
* Wenjuan Zhu, University of Illinois at Urbana-Champaign




Registration is required to attend this event. If you have not already done so, please use the link below to register for a ticket to the conference:

https://www.mrs.org/drc-2022/registration

Registration Is Required

DRC continues to be the world’s premier forum to present innovative semiconductor device research with work on organic thin film transistors, graphene and carbon nanotube transistors, and 2D materials all featuring prominently in the 1990s through to the present day. In 2017, we celebrated DRC’s 75th anniversary with special sessions and an article in the Journal of the Electron Device Society. 
DRC technical topics continue to evolve with emerging device trends such as memory devices, quantum devices, optoelectronics/photonics, and wide bandgap power devices to reflect the exciting work being done by a diverse community of device engineers around the globe.

Heterojunctions made of 2D materials provide promising properties for the realization of tunnel transistors. We demonstrate band-to-band tunneling between layers of WSe2 and MoS2 contacted with few-layered graphene on both sides of the junction and completely encapsulated with hexagonal boron nitride. We also use graphene as a gate electrode, allowing us to realize devices made entirely of different 2D materials. We observe negative differential resistance confirming the tunneling transport in our devices without using any high-k dielectric or chemical doping.

Tunneling transport in WSe2-MoS2 heterojunction transistor enabled by a two-dimensional device architecture

We for the first time report GFETs with 2nm crystalline CaF2 as a gate insulator. We perform the analysis of device-to-device variability and hysteresis dynamics in these devices before and after annealing at 175C. Our results suggest that the counterclockwise hysteresis observed in some devices is due to adsorbates as it can be suppressed by high-temperature treatment. The remaining clockwise hysteresis is record-small which suggests that CaF2 contains much fewer insulator defects as compared to amorphous oxides like SiO2 or Al2O3. Thus, CaF2 is a very promising insulator for 2D electronics.

CVD-GFETs with Record-small Hysteresis Owing to 2nm Epitaxial CaF2 Insulators

We demonstrated the impact of dielectric material and thickness on the stability of ITO FETs, showing that HfO2 dielectrics are more bias-stable than Al2O3 dielectrics. The ITO FETs with 10 nm HfO2 exhibit less VT shifting under both positive and negative bias stressing. This contradicts previous stability studies of other amorphous oxide semiconductors (AOS) (e.g. IGZO, In2O3) that demonstrate higher stability with Al2O3, and demonstrates the need for customized dielectric materials for better oxide FET stability.

Bias Stress Stability of ITO Transistors and its Dependence on Dielectric Properties

This work describes high performance TiO2 thin film transistors using TiO2 as the gate dielectric and channel materials. Bilayer dielectric with high conduction band offset is needed for further enhacing the device performance when TiO2 is used as part of the gate dielectric.

High-performance TiO2 thin film transistors using TiO2 as both channel and dielectric

AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs) with Al2O3 gate insulator were demonstrated on hybrid oriented silicon-on-insulator (SOI) substrate.
The current gain cut-off frequency (fT) of 49.4 GHz and maximum oscillation frequency (fmax) of 54.3 GHz was achieved with 0.3 µm gate length.
Compared to high-resistivity Si (HR-Si) substrate, the current collapse effect can be reduced.
The approach of co-integrated substrate using patterned structures with various dimensions leads to strain relaxation, which contributes to the reduction of current collapse.

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Tunneling transport in WSe2-MoS2 heterojunction transistor enabled by a two-dimensional device architecture

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