VIDEO DOI: https://doi.org/10.48448/5xjq-9a32

technical paper

ESSCIRC ESSDERC 2021

September 14, 2021

Italy

A Sub-50fs-Jitter Sub-Sampling PLL with a Harmonic-Enhanced 30-GHz-Fundemental Class-C VCO in 0.18μm SiGe BiCMOS

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